feat: implement JSR instruction HEAD main

I decided to pull in byteorder to ease up some of the work here.
Additionally, the test program has been modified, and I've added a todo
for the LDR Absolute instruction.

1 files changed, 19 insertions, 3 deletions

diff --git a/src/instruction.rs b/src/instruction.rs
index 4a23992..2390046 100644
--- a/src/instruction.rs
+++ b/src/instruction.rs
@@ -5,20 +5,35 @@
 /// List of all instructions for MOS 6502.
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum Instruction {
+	/// Jump to subroutine.
+	///
+	/// The JSR instruction pushes the address (minus one) of the return point on to the stack and
+	/// then sets the program counter to the target memory address.
+	Jsr,
+
 	/// Load accumulator.
+	///
+	/// Loads a byte of memory into the accumulator, setting the zero and negative flags as
+	/// appropriate.
 	Lda,
 }
 
 /// Addressing modes for MOS 6502.
 #[derive(Clone, Copy, Debug, Eq, PartialEq)]
 pub enum AddressingMode {
-	/// Immediate mode
+	/// Absolute mode.
+	///
+	/// Instructions using absolute addressing contain a full 16 bit address to identify the
+	/// target location.
+	Absolute,
+
+	/// Immediate mode.
 	Immediate,
 
-	/// Zero Page mode
+	/// Zero Page mode.
 	ZeroPage,
 
-	/// ZeroPage.X mode
+	/// ZeroPage.X mode.
 	ZeroPageX,
 }
 
@@ -46,6 +61,7 @@ impl Operation {
 /// operation exists.
 pub const fn get_operation(opcode: u8) -> Option<Operation> {
 	match opcode {
+		0x20 => Some(Operation::new(Instruction::Jsr, AddressingMode::Absolute)),
 		0xA5 => Some(Operation::new(Instruction::Lda, AddressingMode::ZeroPage)),
 		0xA9 => Some(Operation::new(Instruction::Lda, AddressingMode::Immediate)),
 		0xB5 => Some(Operation::new(Instruction::Lda, AddressingMode::ZeroPageX)),